Lattice Semiconductor_MACH131-10JI/1
Lattice Semiconductor_MACH131-10JI/1
Lattice Semiconductor

MACH131-10JI/1  

FPGAs (Field Programmable Gate Array)
MACH131-10JI/1
2-MACH131-10JI/1
CPLD - Complex Programmable Logic Devices HI PERF EE CMOS PLD
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MACH131-10JI/1 Description

CPLD - Complex Programmable Logic Devices HI PERF EE CMOS PLD

Tech Specifications

Mounting Style
SMD/SMT
Supply Current
80 mA
Delay Time
5.5 ns
Supply Voltage - Min
4.5 V
Minimum Operating Temperature
- 40℃
Number of Macrocells
64
Package / Case
PLCC-84
Operating Supply Voltage
5 V
Number of Product Terms per Macro
16
Maximum Operating Frequency
182 MHz
Number of Programmable I/Os
256
Maximum Operating Temperature
+ 85℃
Supply Voltage - Max
5.5 V
Factory Pack Quantity
15

MACH131-10JI/1 Documents

Download datasheets and manufacturer documentation for MACH131-10JI/1

Shopping Guide

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