Lattice Semiconductor
M5-256/160-12YC/1
FPGAs (Field Programmable Gate Array)
M5-256/160-12YC/1
2-M5-256/160-12YC/1
CPLD MACH 5 Family 10K Gates 256 Macro Cells 52.6MHz/83.3MHz 5V 208-Pin PQFP Tray
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Tech Specifications
Mounting Style
SMD/SMT
Delay Time
12 ns
Memory Type
EEPROM
Supply Voltage - Min
4.75 V
Minimum Operating Temperature
0 C
Number of Macrocells
256
Package / Case
PQFP-208
Operating Supply Voltage
4.75 V to 5.25 V
Packaging
Tray
Number of Product Terms per Macro
32
Maximum Operating Frequency
83.3 MHz, 100 MHz
Number of Programmable I/Os
160
Maximum Operating Temperature
+ 70 C
Supply Voltage - Max
5.25 V
Factory Pack Quantity
120
M5-256/160-12YC/1 Documents
Download datasheets and manufacturer documentation for M5-256/160-12YC/1
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