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Lattice Semiconductor_M5-128/104-20YI/1
Lattice Semiconductor_M5-128/104-20YI/1
Lattice Semiconductor

M5-128/104-20YI/1  

FPGAs (Field Programmable Gate Array)
Lattice Semiconductor
M5-128/104-20YI/1
2-M5-128/104-20YI/1
CPLD MACH 5 Family 5K Gates 128 Macro Cells 38.5MHz/50MHz 5V 144-Pin PQFP
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Description Tech Specifications Documents Shopping Guide

M5-128/104-20YI/1 Description

CPLD MACH 5 Family 5K Gates 128 Macro Cells 38.5MHz/50MHz 5V 144-Pin PQFP

Tech Specifications

Mounting Style
SMD/SMT
Delay Time
20 ns
Memory Type
EEPROM
Supply Voltage - Min
4.5 V
Minimum Operating Temperature
- 40℃
Number of Macrocells
128
Package / Case
PQFP-144
Operating Supply Voltage
4.5 V to 5.5 V
Packaging
Tube
Number of Product Terms per Macro
32
Maximum Operating Frequency
62.5 MHz, 83.3 MHz
Number of Programmable I/Os
104
Maximum Operating Temperature
+ 85℃
Supply Voltage - Max
5.5 V
Factory Pack Quantity
24

M5-128/104-20YI/1 Documents

Download datasheets and manufacturer documentation for M5-128/104-20YI/1

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