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Lattice Semiconductor_M4-192/96-18VI
Lattice Semiconductor_M4-192/96-18VI
Lattice Semiconductor

M4-192/96-18VI  

FPGAs (Field Programmable Gate Array)
Lattice Semiconductor
M4-192/96-18VI
2-M4-192/96-18VI
CPLD MACH 4 Family 7.5K Gates 192 Macro Cells 35.7MHz/45.5MHz 5V 144-Pin TQFP Tray
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Description Tech Specifications Documents Shopping Guide

M4-192/96-18VI Description

CPLD MACH 4 Family 7.5K Gates 192 Macro Cells 35.7MHz/45.5MHz 5V 144-Pin TQFP Tray

Tech Specifications

Mounting Style
SMD/SMT
Delay Time
18 ns
Memory Type
EEPROM
Supply Voltage - Min
4.5 V
Minimum Operating Temperature
- 40℃
Number of Macrocells
192
Package / Case
TQFP-144
Operating Supply Voltage
4.5 V to 5.5 V
Packaging
Tube
Number of Product Terms per Macro
20
Maximum Operating Frequency
182 MHz
Number of Programmable I/Os
96
Maximum Operating Temperature
+ 85℃
Supply Voltage - Max
5.5 V
Factory Pack Quantity
60

M4-192/96-18VI Documents

Download datasheets and manufacturer documentation for M4-192/96-18VI

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Shopping Guide

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