Linear Technology
LTC6403IUD-1#TRPBF
FPGAs (Field Programmable Gate Array)
LTC6403IUD-1#TRPBF
2-LTC6403IUD-1#TRPBF
0.5mm 16 Amplifier LTC6403 16 Pin 3V 16-WFQFN Exposed Pad
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LTC6403IUD-1#TRPBF Description
Tech Specifications
Low-Bias
NO
Unity Gain BW-Nom
200000 kHz
Max Supply Voltage
5.25V
Gain Bandwidth Product
200MHz
Average Bias Current-Max (IIB)
25μA
Surface Mount
YES
Radiation Hardening
No
Height Seated (Max)
0.8mm
Number of Functions
1
Package / Case
16-WFQFN Exposed Pad
Number of Channels
1
Lifecycle Status
PRODUCTION (Last Updated: 3 weeks ago)
Number of Pins
16
Nominal Gain Bandwidth Product
200MHz
Input Offset Voltage (Vos)
400μV
Moisture Sensitivity Level (MSL)
1 (Unlimited)
Neg Supply Voltage-Max (Vsup)
-5.5V
Architecture
VOLTAGE-FEEDBACK
Packing Method
TR
Programmable Power
NO
Mounting Type
Surface Mount
Pin Count
16
Resistance
1.7MOhm
Power Supply Rejection Ratio (PSRR)
60dB
Input Offset Current-Max (IIO)
5μA
Packaging
Tape & Reel (TR)
Terminal Pitch
0.5mm
Min Operating Temperature
-40°C
Voltage Gain
90dB
Min Supply Voltage
2.7V
Terminal Finish
Matte Tin (Sn)
Terminal Position
QUAD
Low-Offset
YES
Bandwidth
200MHz
Number of Terminations
16
Supply Voltage
3V
ECCN Code
EAR99
RoHS Status
ROHS3 Compliant
Common Mode Rejection Ratio
50 dB
Applications
Data Acquisition
-3db Bandwidth
200MHz
Micropower
NO
Slew Rate
200 V/μs
JESD-609 Code
e3
Factory Lead Time
8 Weeks
Time@Peak Reflow Temperature-Max (s)
30
Max Operating Temperature
85°C
Peak Reflow Temperature (Cel)
260
Type
ADC Driver
Length
3mm
Part Status
Active
Published
2009
Temperature Grade
INDUSTRIAL
Base Part Number
LTC6403
LTC6403IUD-1#TRPBF Documents
Download datasheets and manufacturer documentation for LTC6403IUD-1#TRPBF
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