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Linear Technology_LTC6240HVCS5#TRMPBF
Linear Technology_LTC6240HVCS5#TRMPBF
Linear Technology

LTC6240HVCS5#TRMPBF

FPGAs (Field Programmable Gate Array)
Linear Technology
LTC6240HVCS5#TRMPBF
2-LTC6240HVCS5#TRMPBF
35mA per Channel 0.5pA 80 dB Instrumentational OP Amps 2.8V~11V ±1.4V~5.5V LTC6240 5 Pins SOT-23-5 Thin, TSOT-23-5
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Description Tech Specifications Documents Shopping Guide

LTC6240HVCS5#TRMPBF Description

Tech Specifications

Low-Bias
YES
Unity Gain BW-Nom
18000 kHz
Surface Mount
YES
Current - Input Bias
0.5pA
Number of Functions
1
Package / Case
SOT-23-5 Thin, TSOT-23-5
Lifecycle Status
PRODUCTION (Last Updated: 3 weeks ago)
Terminal Form
GULL WING
Number of Pins
5
Number of Elements
1
Amplifier Type
General Purpose
Nominal Gain Bandwidth Product
18MHz
Input Offset Voltage (Vos)
40μV
Moisture Sensitivity Level (MSL)
1 (Unlimited)
Operating Temperature
0°C~70°C
Neg Supply Voltage-Max (Vsup)
-6V
Neg Supply Voltage-Nom (Vsup)
-5V
Architecture
VOLTAGE-FEEDBACK
Packing Method
TAPE AND REEL
Mounting Type
Surface Mount
Pin Count
5
Power Supply Rejection Ratio (PSRR)
80dB
Packaging
Tape & Reel (TR)
Voltage - Supply, Single/Dual (±)
2.8V~11V ±1.4V~5.5V
Supply Voltage Limit-Max
6V
Output Type
Rail-to-Rail
Voltage Gain
124.08dB
Frequency Compensation
YES
Terminal Finish
Matte Tin (Sn)
Terminal Position
DUAL
Operating Supply Current
2.7mA
Low-Offset
YES
Bandwidth
18MHz
Number of Terminations
5
Supply Voltage
5V
ECCN Code
EAR99
Qualification Status
Not Qualified
RoHS Status
ROHS3 Compliant
Common Mode Rejection Ratio
80 dB
Slew Rate
10V/μs
JESD-609 Code
e3
Factory Lead Time
8 Weeks
Voltage - Input Offset
60μV
Time@Peak Reflow Temperature-Max (s)
30
Peak Reflow Temperature (Cel)
260
Length
2.9mm
Output Current per Channel
35mA
Part Status
Active
Published
2010
Base Part Number
LTC6240

LTC6240HVCS5#TRMPBF Documents

Download datasheets and manufacturer documentation for LTC6240HVCS5#TRMPBF

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