Linear Technology
LT3591EDDB#TRMPBF
FPGAs (Field Programmable Gate Array)
LT3591EDDB#TRMPBF
2-LT3591EDDB#TRMPBF
3V 0.5mm PMIC LT3591 1MHz 3V 8-WFDFN Exposed Pad
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LT3591EDDB#TRMPBF Description
Tech Specifications
Surface Mount
YES
Terminal Finish
Matte Tin (Sn)
Internal Switch(s)
Yes
Height Seated (Max)
0.8mm
Number of Functions
1
Terminal Position
DUAL
Package / Case
8-WFDFN Exposed Pad
Voltage - Supply (Max)
12V
JESD-30 Code
R-XDSO-N8
Terminal Form
NO LEAD
Number of Terminations
8
Supply Voltage
3V
ECCN Code
EAR99
Width
2mm
Qualification Status
Not Qualified
RoHS Status
ROHS3 Compliant
Moisture Sensitivity Level (MSL)
1 (Unlimited)
Operating Temperature
-40°C~85°C TJ
Applications
Backlight
Voltage - Supply (Min)
2.5V
Topology
Step-Up (Boost)
Mounting Type
Surface Mount
JESD-609 Code
e3
Power Supplies
3V
Factory Lead Time
12 Weeks
Pin Count
8
Number of Outputs
1
Time@Peak Reflow Temperature-Max (s)
NOT SPECIFIED
Peak Reflow Temperature (Cel)
250
Type
DC DC Regulator
Number of Segments
5
Length
3mm
Multiplexed Display Capability
NO
Packaging
Tape & Reel (TR)
Part Status
Active
Frequency
1MHz
Published
2005
Dimming
PWM
Terminal Pitch
0.5mm
Current - Output / Channel
500mA Switch
Base Part Number
LT3591
LT3591EDDB#TRMPBF Documents
Download datasheets and manufacturer documentation for LT3591EDDB#TRMPBF
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