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Lattice Semiconductor_LC5512MV-75QN208C
Lattice Semiconductor_LC5512MV-75QN208C
Lattice Semiconductor

LC5512MV-75QN208C

FPGAs (Field Programmable Gate Array)
Lattice Semiconductor
LC5512MV-75QN208C
2-LC5512MV-75QN208C
Lattice Semiconductor-LC5512MV-75QN208C-datasheet-178202.pdf
Lattice Semiconductor-LC5512MV-75QN208C-datasheets-178202.pdf
CPLD ispXPLD 5000MV Family 150K Gates 512 Macro Cells 150MHz 3.3V 208-Pin PQFP
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Description Tech Specifications Documents Shopping Guide

LC5512MV-75QN208C Description

Tech Specifications

Operating Temperature
0°C ~ 90°C (TJ)
Voltage Supply - Internal
3V ~ 3.6V
ECCN
EAR99
Number of I/O
149
Programmable Type
In System Programmable
Mounting Type
Surface Mount
Product Status
Obsolete
Supplier Device Package
208-PQFP (28x28)
Number of Macrocells
512
Series
ispXPLD® 5000MV
Package / Case
208-BFQFP
Number of Logic Elements/Blocks
16
REACH Status
REACH Unaffected
Mfr
Lattice Semiconductor Corporation
Delay Time tpd(1) Max
7.5 ns
HTSUS
8542.39.0001
Package
Tray
Base Product Number
LC5512
Moisture Sensitivity Level (MSL)
3 (168 Hours)

LC5512MV-75QN208C Documents

Download datasheets and manufacturer documentation for LC5512MV-75QN208C

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Shopping Guide

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