Lattice Semiconductor
ISPPAC-CLK5610V-0
FPGAs (Field Programmable Gate Array)
ISPPAC-CLK5610V-0
2-ISPPAC-CLK5610V-0
In-System Programmable, Enhanced Zero-Delay Clock Generator with Universal Fan-Out Buffer
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ISPPAC-CLK5610V-0 Description
Tech Specifications
Operating Temperature
-40°C ~ 85°C
Ratio - Input:Output
1:10
Differential - Input:Output
Yes/Yes
Mounting Type
Surface Mount
PLL
Yes with Bypass
Series
ispClock
Input
HSTL, LVCMOS, LVDS, LVPECL, LVTTL, SSTL
Voltage - Supply
3V ~ 3.6V
Output
EHSTL, HSTL, LVCMOS, LVDS, LVPECL, LVTTL, SSTL
Packaging
Tray
Part Status
Obsolete
Divider/Multiplier
Yes/No
Number of Circuits
1
Frequency - Max
400MHz
ISPPAC-CLK5610V-0 Documents
Download datasheets and manufacturer documentation for ISPPAC-CLK5610V-0
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