Lattice Semiconductor
GAL20V8B-7LPN
FPGAs (Field Programmable Gate Array)
GAL20V8B-7LPN
2-GAL20V8B-7LPN
SPLD GAL Family 8 Macro Cells 125MHz 5V 24-Pin PDIP
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GAL20V8B-7LPN Description
Tech Specifications
Mounting Style
Through Hole
Operating Temperature
0 C to + 75 C
Supply Current
115 mA
Delay Time
7.5 ns
Supply Voltage - Min
4.75 V
Minimum Operating Temperature
0 C
Number of Macrocells
8
Package / Case
PDIP-24
Operating Supply Voltage
4.75 V to 5.25 V
Number of Product Terms per Macro
8
Maximum Operating Frequency
100 MHz
Maximum Operating Temperature
+ 75 C
Logic Family
GAL
Supply Voltage - Max
5.25 V
Factory Pack Quantity
15
GAL20V8B-7LPN Documents
Download datasheets and manufacturer documentation for GAL20V8B-7LPN
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