Lattice Semiconductor
GAL16V8D-3LJN
FPGAs (Field Programmable Gate Array)
GAL16V8D-3LJN
2-GAL16V8D-3LJN
SPLD GAL Family 8 Macro Cells 250MHz 5V 20-Pin PLCC
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Tech Specifications
Mounting Style
SMD/SMT
Operating Temperature
0 C to + 75 C
Supply Current
115 mA
Delay Time
3.5 ns
Supply Voltage - Min
4.75 V
Minimum Operating Temperature
0 C
Number of Macrocells
8
Package / Case
PLCC-20
Operating Supply Voltage
4.75 V to 5.25 V
Number of Product Terms per Macro
8
Maximum Operating Frequency
250 MHz
Maximum Operating Temperature
+ 75 C
Logic Family
GAL
Supply Voltage - Max
5.25 V
Factory Pack Quantity
46
GAL16V8D-3LJN Documents
Download datasheets and manufacturer documentation for GAL16V8D-3LJN
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